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1 кэш с чередованием адресов
Русско-английский большой базовый словарь > кэш с чередованием адресов
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2 память с чередованием адресов
Русско-английский большой базовый словарь > память с чередованием адресов
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3 удачное обращение в кэш
Русско-английский большой базовый словарь > удачное обращение в кэш
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4 кэш
1. cache2. cache memory -
5 запоминающее устройство с чередованием адресов
1. interlaced storage2. interleaved storageРусско-английский большой базовый словарь > запоминающее устройство с чередованием адресов
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6 кэш с чередованием адресов
Information technology: interleaved cache (выбираемых команд), multiple cachesУниверсальный русско-английский словарь > кэш с чередованием адресов
См. также в других словарях:
Interleaved memory — is a technique for compensating the relatively slow speed of DRAM. The CPU can access alternative sections immediately without waiting for memory to be cached. Multiple memory banks take turns supplying data.An interleaved memory with n banks is… … Wikipedia
Multithreading (computer architecture) — This article describes hardware supports for multithreads. For thread in software, see Thread (computer science). Multithreading computers have hardware support to efficiently execute multiple threads. These are distinguished from multiprocessing … Wikipedia
Simultaneous multithreading — Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better utilize the resources… … Wikipedia
Multithreading (computer hardware) — Multithreading computers have hardware support to efficiently execute multiple threads. These are distinguished from multiprocessing systems (such as multi core systems) in that the threads must all operate in the same address space, as there is… … Wikipedia
SDRAM — refers to synchronous dynamic random access memory, a term that is used to describe dynamic random access memory that has a synchronous interface. Traditionally, dynamic random access memory (DRAM) has an asynchronous interface which means that… … Wikipedia
Intel Core (microarchitecture) — This article is about the Intel microarchitecture. For Intel processors branded as Intel Core, including the Core microarchitecture based Core 2 and others not based on the Core microarchitecture, see Intel Core. The Intel Core microarchitecture… … Wikipedia
Memory organisation — There are several ways to organise memories with respect to the way they are connected to the cache: one word wide memory organisation wide memory organisation interleaved memory organisation independent memory organisation Contents 1 One Word… … Wikipedia
DECstation — The model identification medallion of a DECstation 5000 Model 120 … Wikipedia
Cooley–Tukey FFT algorithm — The Cooley–Tukey algorithm, named after J.W. Cooley and John Tukey, is the most common fast Fourier transform (FFT) algorithm. It re expresses the discrete Fourier transform (DFT) of an arbitrary composite size N = N1N2 in terms of smaller DFTs… … Wikipedia
Cooley-Tukey FFT algorithm — The Cooley Tukey algorithm, named after J.W. Cooley and John Tukey, is the most common fast Fourier transform (FFT) algorithm. It re expresses the discrete Fourier transform (DFT) of an arbitrary composite size N = N 1 N 2 in terms of smaller… … Wikipedia
DEC 3000 AXP — DEC 3000 Model 700 Server DEC 3000 AXP was the name given to a series of computer workstations and servers, produced from 1992 to around 1995 by Digital Equipment Corporation. The DEC 3000 AXP series formed part of the first generation of… … Wikipedia